MTS, FECOS CPIE DEVICE

About the role

You will enable technology ramp in high-volume production for CMOS and memory devices. You will improve device performance with a focus on variability reduction and robustness. You will support and execute design and test optimisation to enhance manufacturability and performance. You will identify and implement process simplification and working methodology improvements. You will lead or contribute to cross-functional problem-solving for device, yield, and quality issues.

Requirements

• Minimum 5 years of relevant working experience
• Master's or Ph.D. degree in Physics or Engineering preferred
• Working experience in wafer fab process or process integration engineering
• Direct experience in advanced CMOS device technology such as FinFET or GAA preferred
• Proven knowledge in semiconductor physics and transistor operations
• Understanding of wafer fabrication process areas